Printed circuit assemblies (PCA's), such as printed circuit boards (PCB's) that include electronic components soldered to the PCB, are used in a majority of electronic products. Those products include consumer electronics products such as personal computers, laptop computers, hard disc drives, cell phones, personal digital assistants (PDA's), digital music players, and video display and playback systems, just to name a few. Contact repeatability failures during an in-circuit-test (ICT) of the PCA's is one factor that effects a manufacturing cost and a reliability of electronic products.
The contact repeatability failures are due to probes (also called plungers) that are connected with a test fixture that is positioned relative to the PCA so that a tip of the probe contacts a test point on the PCA. Typically, the test point is a test pad, a through hole via, or a blind via connected with the PCA. For economic and environmental reasons, a no-clean manufacturing process is preferred to assemble PCAs during which paste is applied to test vias or test pads with a lead-based or lead-free solder paste. After the pasting, the solder paste is heated to reflow the solder paste so that a solder component of the paste wets a pad surface of the via or test pad. The reflowing also causes a flux component of the paste to be released. The resulting flux pools in the via holes or in an areas surrounding the test via pads can result in the aforementioned contact repeatability failures by preventing the test probe from making electrical contact with the via.
For example, in the case of a via, during reflow, a portion of the solder wets a pad of the via and another portion of the solder flows into a hole of the via and partially or completely fills the hole. Additionally, the flux also flows into the hole and pools on top of the solder. As a result, the hole is clogged by the flux/solder and the clog can be partially recessed below a level of the pad, can be flush with the pad, or can extend above the level of the pad. During ICT when the probe on the test fixture is urged into contact with the via in order to electrically contact the solder on the pad, a plunger tip of the probe cannot enter into the hole due to the clogging. Consequently, an electrical contact between the probe and the solder is prevented and the ICT may indicate that the unit-under-test (UUT) is defective because of a contact failure between the probe and the via. Examples of prior plunger tip styles that may not reliably contact the solder on the test point include single needle tips, headed and headless, chisel tips, spear tips, star tips, multi-sided arrowhead tips, and multi-pointed crown and tulip tips, just to name a few.
The economic impact of contact repeatability failures include passing bad boards, rejecting or discarding good boards, down time necessary to troubleshoot the test fixture or the UUT, increase warranty cost due to product failures in the field, unhappy consumers who purchase defective products, and loss of goodwill and brand loyalty due to defective products.
Prior solutions to the contact repeatability failures include not pasting the pads for lead-based processes that use a hot air solder leveling finish (HASL). finishes such as ENIG and electrolytic nickel-gold (Ni/Au) can be used, but those finishes increase production costs and risk some intermetallic reliability issues. Immersion silver (Ag) is not as costly as ENIG or electrolytic Ni/Au but can result in reliability issues, whisker growth and solderability issues. Similarly, an immersion tin (Sn) finish poses a high risk of whisker growth and reliability issues. Another solution is solder paste overprinting; however, the overprinting requires the use of microvias which create problems of their own and can result in solder bleeding to the other side of the PCB creating an obstruction for pasting and loading components on the opposite side of the PCB. Finally, one solution includes wave soldering the test points along with other through hole components on the PCB. However, wave soldering solution is not suitable for all applications.
Of all of the aforementioned solutions, an organic solderability preservative (OSP) finish is the lowest cost and currently most reliable finish. OSP's are applied to a bare surface of a conductor (e.g. a copper trace or pad) on a PCB. The OSP's are applied after the PCB is manufactured to prevent oxidation of the copper conductors while the PCB awaits the assembly process where the solder paste is applied, components are loaded on the PCB, and the PCB is reflowed. By preventing oxidation of the copper, the OSP's ensure the solderability of the PCB. In general, all test points (e.g. vias or test pads) are more probable (i.e. have better contact reliability) when pasted and then reflowed so that the solder wets the surface of the pad.
Screen printing with no-clean lead-free solder paste which has a higher flux content results in flux pools and contamination. Consequently, plunger tips with multiple points become clogged by the high no-clean flux residue of the solder. Moreover, the high no-clean flux residue contaminates the pad or via so that electrical continuity cannot be established between the plunger tip and the UUT. Plunger tips with multiple points or edges can exasperate the contact reliability problem because a contact pressure of the plunger tip with the pad is a force being applied by the tip (usually via a helical coil spring) divided by a contact area of the tip with the pad. The contact area increases with the number of points/edges in contact with the pad and reduces the contact pressure. As a result, a pressure necessary to cut through the contamination on the pad is reduced and the plunger tip does not make an electrical contact with the solder on the pad.
Consequently, there is a need for a probe that includes a tip that overcomes the problems created by OSP's and a no-clean high flux content solder pasting process. There is also a need for a probe tip that reduces the number of edges that come into contact with a solder on a pad so that contact pressure is not compromised, and that also minimizes the risk of making contact with adjacent circuits if misaligned.